VLSI Implemntation of OFDM

OrthogonalFrequencyDivisionMultiplexing (OFDM) is a multicarrier modulation technique which divides the available spectrum into many carriers. OFDM uses the spectrumefficiently compared to FDMA by spacing the channels much closer together andmaking all carriers orthogonal toone another[1]. In OFDM applications, IFFT/FFT hardware in the transceiver is usually designed jointly to carry out IFFT and FFT functions for transmission and receiving processes, respectively. In this paper, we present a new IFFT/FFT hardware implementation structure with less complexity for OFDM applications. The proposed method can be applied to existing various FFT algorithms while implementing the OFDM. The 64point IFFT/FFT chips for the Radix-4/2 and Radix-Z14/8 algorithms based on the proposed scheme are implemented by using TSMC .35jm, TSMC 2Spm and UMC[10] . I8p CMOS technologies[5,6,7]. The implementation results show that our method can achieve a less complexity and area-efficiency IFFT/FFT processor. The low symbol rate makes the use of a guard interval between symbols affordable, making it possible to handle time-spreading and eliminate inter symbol interference (ISI). This mechanism also facilitates the design of singlefrequency networks, where several adjacent transmitters send the same signal simultaneously at the same frequency, as the signals ,from multiple distant transmitters may be combined constructively, rather than interfering as would typically occur in a traditional single-carrier system. In this project, The OFDM transceiver will be designed with VHDL language and implemented in Cyclone 2 FPGA device on DE2-70 board, which includes the OFDM transmitter(16 QAM modulator and length N IDFT) and receiver( length N DFT and 16 QAM demodulator).and area-efficiency IFFT/FFT processor[2].